LINEAR INTEGRATED CIRCUITS (LIC) - May / June 2012 Question Paper

Anna University

B.E/B.Tech. DEGREE EXAMINATION, MAY/JUNE 2012.

Fourth Semester .

Electronics and Communication Engineering

LINEAR INTEGRATED CIRCUITS

(Common to PTEC 2254 Linear Integrated Circuits for B.E.(Part -Time) - Third Semester ECE - Regulation 2009)

(Regulation 2008)

Subject Code : EC 2254/l47404/EC 44/10144 EC 405/EC 1254/080290022
Subject Name : LINEAR INTEGRATED CIRCUITS


Time : Three hours
Maximum: 100 marks

Answer ALL questions.

PART A—(lOx2= 2Omarks)

1. What are the two requirements to be met for a good current source?
2. List the various methods of realizing high input resistance in a differential amplifier.
3. Why active guard drive is necessary for an instrumentation amplifier?
4. What is comparator?
5. What are the advantages of variable transconductance technique?
6. VCO is also called as V-f converter. Why?
7. Define settling time of D/A converter.
8. What is the main drawback of dual slope ABC?
9. What are the limitations of three terminal regulator? .
10. What is a switched capacitor filter?


PART B — (5 x 16 = 80 marks)
11. (a) (i) With neat circuit diagrams, explain the operation of
(1) voltage reference circuit using temperature compensation
(2) voltage reference circuit using avalanche diode reference.                (12)
(ii) The current mirror shown below, is to provide a 1 mA current with Vcc = 10V.Assume ß 125 and VBE = 0.7V.



(1) Determine the value of R1
(2) Also, for a collector current of 10 micro amperes, find the value of R1.             (4)

Or

(b) (i) List and explain the non-ideal DC characteristics of an operational amplifier. (8)
(ii) Explain the AC characteristics of an operational amplifier.

12. (a) (i) Sketch the basic circuit using op-amp to perform the mathematical operation of differentiation and explain. What are the limitations of an ordinary OP-AMP differentiator? Draw and explain the circuit of
a practical differentiators that will eliminate these limitations. (8)
(ii) Draw and explain the circuit of a voltage to current converter if the load is
(1) Floating
(2) Grounded.



Or

(b) (i) Explain the working of OP-AMP based Schmitt trigger circuit. (8)
(ii) Design an OP-AMP based second order active low pass filter with cut off frequency 2 kHz. (8)

13. (a) (i) List and define the various performance parameters of a Multiplier IC. (6)
(ii) How the multiplier is used as voltage divider? (5)
(iii) How the multiplier is used as frequency doubler? (5)

Or

(b) Explain, with neat block diagrams, how PLL is used as
(i) AM Detector . (5)
(ii) FM Detector . (5)
(iii) Frequency Synthesizer. (6)

14. (a) (i) Explain the following types of electronic switches used in D/A converter, with suitable diagrams:
(1) Totem pole MOSFET switch (4)
(2) CMOS inverter as a switch. . (4)
(ii) Explain the working of R-2R ladder DAC, by taking example of a 3-bit DAC circuit. Sketch the corresponding equivalent circuits and hence obtain the equation for output. (8)

Or

(b) (i) With neat circuit diagram and wave form of output, explain the working of Dual slope A/D converter. (10)

(ii) Give a table of comparison of Flash, Dual-slope and Successive approximation ADCs, in terms of parameters like speed, accuracy, resolution, input-hold-time. (6)

15. (a) Sketch the functional block diagram of the following and explain their working principle:
(i) IC 555 Timer. (8)
(ii) General purpose voltage regulator IC 723. (8)

Or

(b) (i) With neat diagram, explain the working principle of isolation amplifier. (8)
(ii) With neat diagram, explain the principle of operation of optocouplers. (8)

MICROPROCESSORS AND MICRO CONTROLLERS - May / June 2012 Question Papers

Anna University

B.E./B.Tech. DEGREE EXAMINATION, MAY/JUNE 2012.

Fourth Semester

MICROPROCESSORS AND MICRO CONTROLLERS

Computer Science and Engineering

(Common to Information Technology)

(Regulation 2008)

Subject Code : CS 2252/141402/CS 42/EC 1257/10144 CS 403/080250010
Subject Name : MICROPROCESSORS AND MICRO CONTROLLERS

Time : Three hours
Maximum: 100 marks

Answer ALL questions.

PART A—(10 x 2=20 marks)

1. How many memory locations can be addressed by 8085 microprocessor?
2. Give an example for direct and indirect addressing modes of 8085.
3. What are called as assembler directives? Give two examples.
4. What is BIOS function call in 8086 pp?
5. Compare closely coupled configuration features with loosely coupled configuration features. .
6. List any four 8087 data formats.
7. Why a latch is used for an 0/P port, but a tn-state buffer can be used for an input port?
8. List the six modes of timer.
9. What is the size of the on-chip program memory and on-chip data memory of 8051 microcontroller? .
10. List the features of the parallel ports of 8051 microcontroller.

PART B — (5 x 16 = 80 marks)

11. (a) (i) Explain the execution. of the instruction MVI A,32h with a timing diagram. . (8)
(ii) Write an 8085 Assembly language program to multiply two 8-bit number, which is stored in the memory location 4500h and 4501h. Store the product in the subsequent memory locations? (8)

Or

(b) . (i) Explain the different addressing modes in 8085 microprocessor. Give two examples for each addressing mode. (8)
(ii) Write an 8085 assembly language program to find the largest 8-bit number among the five numbers which are stored in the memory locations 4200h to 4204h. (8)

12. (a) (i) Draw the architectural block diagram of 8086 microprocessor and explain. (8)
(ii) Explain how to pass parameters to macros?

Or

(b). (i) Explain . the interrupt structure of an 8086 microprocessor with 8086 interrupt-pointer table. (8)
(ii) Write an 8086 assembly language program to read in 100. samples of data at 1-ms intervals. (8)

13. (a) (i) Draw the 8087 internal architecture and explain.
(ii) Give two examples of 8087 data transfer instructions, arithmetic instructions, processor control instructions and transcendental instructions. . (8)

Or

(b) (i) Draw the architecture of 8089 I/O processor and explain.
(ii) Explain how I/O processor communicates between the CPU and I/O peripherals with an example. (8)

14. (a) (i) Explain the operating modes of 8255 programmable peripheral interface. (8)
(ii) Draw the control word format of 8254 programmable interval timer and explain. (8)

Or

(b) (i) Draw the architectural block diagram of 8259 Programmable interrupt controller and explain. (8)

(ii) Write a program to make the stepper motor to rotate both clockwise and counter clock wise direction. (8)

15. (a) (i) Draw the architectural block diagram of 8051 microcontroller and explain. (8)
(ii) Draw the circuit diagram to interface an LCD with microcontroller and explain how to thsplay the data using LCD. (8)

Or

(b) (i) Draw the circuit diagram to interface a keyboard with microcontroller and explain how microcontroller recognizes the key-press. . (8)

(ii) Program the on-chip timer in 8051 to be an event counter. Use model and display the binary count on P1. Set the initial count to be Zero. (8)

POWER PLANT ENGINEERING (PPE) - May / June 2012 Question Paper

Anna University

B.E/B.Tech. DEGREE EXAMINATION, MAY/JUNE 2012.

Fourth Semester

Electrical and Electronics Engineering

POWER PLANT ENGINEERING 

(Regulation 2008)

Subject Code : EE 2252/1314021EE 43/EE 1252/10133 EE 403/080280027

Subject Name : POWER PLANT ENGINEERING

Time : Three hours
Maximum: 100 marks

Answer ALL questions

PART A—(10x2=20marks)

1. What is the function of deaerator in a thermal power plant?
2. Why thermal plants are not suitable for supplying fluctuating loads?
3. On what factors does the selection of a water turbine for hydel plants depend upon?
4. What for surge tank is provided in the hydel plant?
5. What is nuclear fission?
6. Name the three moderators commonly used in nuclear power reactor.
7. What are the methods by which the efficiency of an open cycle gas plant can be improved?
8. What is meant by regeneration?
9. What is a solar cell?
10. What is the principle of a thermoelectric power generator?






PART B—(5x 16=80marks)

11. (a) (i) With the help of a neat sketch describe the working of any one type of ash handling system. (8)
(ii) What do you understand by fluidized bed combustion? (8)

Or

(b) (i) Explain with the aid of sketches forced draft and induced draft system. (8)
(ii) Why is coal pulverized? Explain any one type of pulverized systems used now-a-days. (8)

12. (a) (i) With the help of a simple diagram, explain the essential features of hydro power plant. (12)
(ii) What is the function of a draft tube? (4)

Or

(b) (i) Compare and contrast Kaplan turbine and Franis turbine. (8)
(ii) What is meant by a pumped storage plant? Discuss its advantages and disadvantages. (8)

13. (a) Discuss why?
(i) Nuclear power plants are used only as base load plants. (4)
(ii) A nuclear reactor needs a moderator material. (6)
(iii) Control rods are used in nuclear power reactor. (6)

Or

(b) (i) Discuss the advantages and disadvantages of a nuclear plant as compared to other conventional power plants. (8)
(ii) Explain what is chain reaction in connection with a nuclear reactor. (8)

14. (a) Draw a layout of diesel power plant, showing various systems and explain each system in detail. (16)

Or

(b) Draw diagrams and explain the difference between open cycle and closed cycle gas turbine plants. (16)

15. (a) With a neat diagram, explain MHD power generation technology and list its advantages.  (16)

Or

(b) Write a technical note on the following: (6 + 5 + 5)
(i) Fuel Cell
(ii) Thermionic converter
(iii) Geothermal power generation.

DATABASE MANAGEMENT SYSTEMS (DBMS) - May / June 2012 Question Paper

Anna University
B.E./B.Tech. DEGREE EXAMINATION, MAY/JUNE 2012.
Fourth Semester

DATABASE MANAGEMENT SYSTEMS
Computer Science and Engineering

(Common to Information Technology)

(Regulation 2008)

 

Subject Code : CS 2255/141405/CS 46/CS 1254/10 144 CS 406/080250009
Subject Name : DATABASE MANAGEMENT SYSTEMS

Time : Three hours
Maximum: 100 marks

Answer ALL questions
 PART A—(10 x 2=20 marks)

1. List four significant differences between a file-processing system and a DBMS.
2. What are the different types of Data Models?
3. Describe a circumstance in which you would choose to use embedded SQL rather than using SQL alone.
4. List two major problems with processing of update operations expressed in terms of views.•
5. Give an example of a relation schema R and a set of dependencies such that R is in BCNF, but not in 4NF
6. Why are certain functional dependencies called as trivial functional dependencies?
7. List down the SQL facilities for concurrency.
8. What benefit does strict two-phase locking provide? What disadvantages result?
9. Mention the different Hashing techniques. .
10. When is it preferable touse a dense index rather than a sparse index? Explain your answer. .

PART B - (5 x 16= 80 marks)

 11. (a) Discuss in detail about database system architecture with neat diagram.

Or

(b) Draw an E-R diagram for a banking enterprise with almost all components and explain.
12. (a) Explain in detail about Relational Algebra, Domain Relational Calculus and Tuple Relational Calculus with suitable examples.

 Or

(b) Briefly present a survey on Integrity and Security.

13. (a) Explain in detail about 1NF, 2NF, 3NF and BCNF with suitable examples.

 Or

(b) Describe about the Multi-Valued Dependencies and Fourth normal form with suitable example.

14 (a) Discuss in detail about Transaction Recovery, System Recovery and Media Recovery.

 (b) Write down in detail about Deadlock and Serializability.

15. (a) Construct a B+ tree to insert the following key elements (order of the tree is 3) 5, 3, 4, 9, 7, 15, 14, 21, 22, 23.

Or

(b) Describe in detail about how records are represented in a file and how to organize them in a file.

ELECTRICAL MACHINES - I - May / June 2012 Question Paper

Anna University

B.E/B.Tech. DEGREE EXAMINATION, MAY/JUNE 2012

Fourth Semester
Electrical and Electronics Engineering

ELECTRICAL MACHINES - I

(Regulation 2008)

Subject code : EE 2251/131401/EE 42/EE 1251 A/ 10133 EE 402/080280003

Subject Name : ELECTRICAL MACHINES — I

Time : Three hours
Maximum: 100 marks
Answer ALL questions.

PART A—(10x2=20 marks)

1. Clearly define the MMF and EMF.
2. What are the core losses and how can this loss be minimized?
3. What happens if DC supply is applied to the transformer?
4. Why all day efficiency is lower than commercial efficiency?
5. What do you mean by co energy?
6. What are the requirements of the excitation systems?
7. What is meant by reactance voltage?
8. Why fractional pitched winding is preferred over full pitched winding?
9. Define commutation.
10. Why DC series motor is not suitable for belt driven loads?

PART B—(5x16=80marks)

11. (a) Explain clearly the statically and dynamically induced EMF. (16)

Or

(b) (i) Discuss AC operation of magnetic circuits (10)
(ii) A single phase, 50Hz, 100KVA transformer for 12000/240V ratio has a maximum flux density of 1.2 Wb/m2- and an effective core section of 300 cm2, the magnetising current (RMS) is 0.2A. Estimate the inductance of each wire on open circuit. (6)

12. (a) Describe the method of calculating the regulation and efficiency of a single phase tranformer by OC and SC tests. (16)

Or

(b) (i) Derive an expression for the emf of an ideal transformer. (6)
(ii) Calculate the efficiency at half, full load of a 100 KVA transformer for PF of unity and 0.8. The copper loss is 1000 W at full load and iron loss is 1000 W. (10)

13. (a) Deduce an expression for the mechanical force of field origrn in a typical attracted armature relay. (16)

Or

(b) Find an expression for the magnetic force’ developed in a multiply excited magnetic systems. . (16)

14. (a) Explain the construction and principle of operation of synchronous machines. (16)

Or

(b) A 2000V, three phase star connected synchronous motor has an effective resistance and synchronous reactance of 0.2 Ohm and 2.2 Ohm per phase respectively. The input is 800Kw at normal voltage and the induced line emf is 2500V. Calculate the line current and power factor. (16)

15.(a) Explain the different methods of excitation and characteristics of a DC generators with suitable diagrams. (16)

Or

(b) What are the methods of speed control of a DC shunt motor? and brieflý
explain them with help of neat diagram. (16)

SOFTWARE ENGINEERING AND QUALITY ASSURANCE–May / June 2012 Question Paper

Anna university

B.E./B.Tech. DEGREE EXAMINATION, MAY/JUNE 2012.

Fourth Semester

Information Technology

Question Paper

---

Subject Code : IT 2251/142401/IT 4111T 1251 A110144 IT 406!08025003

Subject Name : SOFTWARE ENGINEERING AND QUALITY ASSURANCE

(Regulation 2008)

---

Time : Three hours

Maximum: 100 marks

---

Answer ALL questions.

PART A — (10 x 2 = 20 marks)

1. , Name the task regions of a Spiral model.

2. What are different approaches to the sizing problem?

3. What is the need for a Data Dictionary?

4. What is requirement validation? Who is responsible for this activity?

5. What is the importance of UT design?

6. What is design heuristics?

7. What is smoke testing? .

8. Define testability.

9. Differentiate metrics with measurement.

10. What is the purpose of a SQA plan? What does it identify? .

---

PART B — (5 x 16 = 80 marks)

11. (a) (i) Suppose you have to develop a software for a.client with minimum risk involved in development. But the client is not in a position to define the detailed input and output requirements. In this situation which software process model would you choose? Justify your answer.                                                                                      (8)

(ii) What is Systems Engineering? Explain.                                   (8)

Or

(b) (i) Differentiate the features of various software lifecycle models highlighting their advantages and disadvantages.                       (10)

(ii) Explain the concept of Business Process Engineering.           (6)

---

12. (a) (i) Discuss the problems of using natural language for defining user and system requirements and give small examples of how structuring natural language into forms can help avoid some of the difficulties.                                                                                            (8)

(ii) Explain how a software requirement document is structured. (8)

Or

(b) An automated ticket issuing system sells rail tickets. Users select their destination, and input a credit card and a personal identification number. The rail ticket is issued and their credit card account charged with its cost. When the user presses the start button, a menu display of potential destinations is activated along with a message to the user to select the destination. Once a destination has been selected, users are requested to input a personal identifier. When the credit transaction has been validated, the ticket is issued.

(i) Write a set of a non functional requirements setting out its expected reliability and its response time.

(ii) Identify the ambiguities or omissions in the statement and write the system requirements using java based notation. Any reasonable assumptions could be made.                                                            (16)

---

13 (a) Write short notes on :

(i) User Interface Design.                                                                (8)

(ii) Modular design.                                                                          (8)

Or

(b) Explain the various steps involved in analysing and designing a data acquisition system.                                                                (16)

---

14 (a) (i) Is it beneficial to allow users to test the software before finally accepting it? If yes Whý? Explain the testing through which the user tests the software. What are the various levels of testing that could be performed for a particular software.                  (10)

(ii) Explain with example, how boundary conditions in a software are tested.                                                                                               (6)

OR

(b) Write short notes on:

(i) Regression testing

(ii) Validation testing

(iii) Mutation testing

(iv) Coverage based testing.                                                        (16)

---

15. (a) Design a project database system that would enable software engineer to store, cross-reference, trace. update, change. etc. all-important S/w configuration items. How woild the database handle different versions of the same program? How will two developers be precluded from making different changes to the same SCI at the same time?                                                                                   (16)

Or

(b) (i) Explain the various types of process metric that may be collected as part of a process improvement process. Give an example for each type of metric.                                                               (6)

(ii) Explain the various levels of SEI process capability maturity model.                                                                                          (10)

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DIGITAL LOGIC CIRCUITS (DLC)–May / June 2012 Question Paper

Anna University

B.E./B.Tech. DEGREE EXAMINATION, MAY/JUNE 2012

Fourth Semester

Electrical and Electronics Engineering

---

Subject Code : EE 2255/131405/EE 46/EC 1261 A/10133 EE 406/080280029

Subject Name : DIGITAL LOGIC CIRCUITS

---

(Regulation 2008)

Time : Three hours

Maximum: 100 marks

---

Answer ALL questions.

PARTA—(10x2 =20marks)

1. Express the following switching circuit in binal7 logic notation.

2. What is priority encoder?

3. Give the characteristic equation and state diagram of JK flip-flop.

4. What is lockout? How it is avoided? .

5. How does the operation of an asynchronous input differ from that of a synchronous input? .

6.Define flow table in asynchronous sequential circuit.

7.What is a PLA?

8.List the configurable elements in the FPGA architecture.

9.What are the various modeling techniques in HDL?

10.Write HDL for half adder.

---

PARTB—(5x16=80marks)

11. (a) (i) Implement the following Boolean function with NAND – NAND logic. :

Y=AC+ABC+A’BC+AB+D                                                              (6)

(ii) Simplify and implement the following sop function using NOR gates. .

f(A,B,C,D) =  ∑m(0, 1, 4, 5, 10, 11, 14, 15).                                (10)

Or

(b) (i)  Implement the given function using multiplexer

F(x, y, z)= ∑(0, 2, 6, 7).                                                                   (8)

(ii) Implement full subtractor using demuitiplexer.                   (8)

---

12. (a)(i) Realize SR flip-flop using NOR gates and explain its operation.                                                                                           (8)

(ii) Convert a SR flip-flop into JK flip-flop.                                    (8)

Or

(b) A sequential circuit with 2D FFs A and B and input X and output Y is specified by the following next state and output equations.

A(t+1)=AX+BX .

B(t÷1)=A’X .

Y =(A+B)X’

(i) Draw the logic diagram of the circuit.

(ii) Derive the state table.

(iii) Derive the state diagram.                                                  (16)

---

13. (a) (i) Design a pulse mode circuit with inputs x1, x2, x3 and output Z as shown in figure 1.

(ii) The output should change from O to 1, only for input sequence x1— x2 — x3 occurs while z = O. Also the output z should remain in 1 until x2 occurs Use SR flip-flops for the design.                   (16)

OR

(b) (i) List and explain the steps used for analyzing an asynchronous sequential circuit.                                                                            (8)

(ii) Derive the flow table for the circuit given in the figure 2.   (8)

---

14. (a) Write notes on ROM and its types.                                (16)

Or

(b) (i) A combinational logic circuit is defined by the following function.                                                                                           (10)

f1(a,b,c) =  ∑(O, 1, 6, 7),

f2(a, b, e) =  ∑(2, 3, 5,7)

Implement the circuit with a PAL having three inputs, product terms and two outputs.

(ii) Describe the concept and working of FPGA.                         (6)

---

15. (a) Explain RTL design using VHDL with the help of example.                                                                                            (16)

Or

(b) Write the VHDL code for mod 6 counter.                             (16)

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DIGITAL LOGIC CIRCUITS–April / May 2010 Question Paper

Anna University

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Electrical and Electronics Engineering

EE2255 — DIGITAL LOGIC CIRCUITS

(Regulation 2008)

---

Time: Three hours

Maximum: 100 Marks

Answer ALL Questions

---

PART A — (10 × 2 = 20 Marks)

1. Show that

(a) a + a'b = a + b

(b) x' y' z + x' yz + xy' = x' z + xy' .

2. Draw the Truth table and logic circuit of half adder.

3. Draw the circuit of SR Flip flop.

4. What are synchronous sequential circuits?

5. Give the characteristic equation and state diagram of JK flip flop.

6. What is a self starting counter?

7. What is the advantage of PLA over ROM?

8. Which IC family offers (a) low propagation delay, and (b)low power dissipation?

9. Write HDL for half adder.

10. What are the various modeling techniques in HDL?

---

PART B — (5 × 16 = 80 Marks)

11. (a) (i) Simplify using k-map

F (w, x, y, z ) = ∑ (0,1,2,4,5,6,8,9,12,13,14) . (8)

(ii) Design a BCD to Excess-3 code converter. (8)

Or

(b) (i) Solve g (w, x, y, z ) = ∑ m (1,3,4,6,11) + ∑ d (0,8,10,12,13) . (8)

(ii) Design a decimal adder to add two decimal digits. (8)

12. (a) Design a synchronous sequential circuit using JK for the given state diagram. (16)

Or

(b) Design a BCD counter using T flip flop. (16)

13. (a) Design BCD ripple counter using JK flip flop. (16) Or

(b) (i) Reduce the number of states in the following state table. (12) Next state Output

(ii) Starting from a, find the output sequence generated with input sequence 01110010011. (4)

14.	(a)	(i)	Design a combinatorial circuit using ROM. The circuit accepts 3-bit
			number and generates an output binary number equal to square of input number. (8)
		(ii)	Repeat the above problem using PLA. (8)

Or

(b) (i) Compare all the IC logic families based on

(1) Power consumption

(2) Fan out

(3) Power dissipation (4) Propagation delay (5) Switching speed

(6) Noise margin. (8)

(ii) Describe the different types of memories. (8)

15. (a) Write HDL program for full adder and 4 bit comparator. (16)

Or

(b)	(i)	Write an HDL behavioral description of JK flip flop using statement based on the value of present state.	if-else (8)
	(ii)	Draw the logic diagram for the following module.	(8)
		module seqcrt (A, B, C, Q, CLK) ;
		input A, B, C, CLK ;
		output Q ;
		reg Q, E ;
		always @ (Posedge CLK)
		begin
		E < = A & B ;
		Q < = E/C ;
		end
		end module

————––––—

NUMERICAL METHODS - April / May 2010 Question Paper

Anna University

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Civil Engineering

MA2264 – NUMERICAL METHODS

(Regulation 2008)

(Common to Aeronautical Engineering and Electrical and Electronics Engineering)

Download :

• NM AprMay 10.pdf (74kb) 

LINEAR INTEGRATED CIRCUITS (LIC)–April / May 2010 Question Paper

Anna University

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Electronics and Communication Engineering

EC2254 — LINEAR INTEGRATED CIRCUITS

(Regulation 2008)

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Time: Three hours Maximum: 100 Marks

Answer ALL Questions

---

PART A — (10 × 2 = 20 Marks)

1. What is an integrated circuit?

2. What is current mirror?

3. Give the schematic of op-amp based current to voltage converter.

4. Draw the circuit diagram of differentiator and give its output equation.

5. What is a VCO?

6. Draw the relation between the capture ranges and lock range in a PLL.

7. Define resolution of a data converter.

8. Give the advantages of integrating type ADC.

9. Draw the internal circuit for audio power amplifier.

10. What are the three different wave forms generated by ICL8038?

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PART B — (5 × 16 = 80 Marks)

11. (a) (i) Define CMRR. Draw the circuit of an Op-amp differential amplifier and give the expression for CMRR. (8)

(ii) Define Slew Rate. Explain the cause of slew rate and derive an expression for Slew rate for an op-amp voltage follower. (8)

Or

(b) Briefly explain the various processes involved in fabricating monolithic IC which integrates bipolar transistor, diode, capacitor and resistor. (16)

---

12. (a) (i) Design a first order Low-pass filter for cut-off frequency of 2 KHz and pass-band gain of 2. (8)

(ii) Explain a positive clipper circuit using an Op-amp and a diode with neat diagrams. (8)

Or

(b) (i) Design a circuit to implement V0 = 0.545V3 + 0.273V4 −1.25V1 − 2V2 . (8)

(ii) Draw and explain a simple Op-amp differentiator. Mention its limitations. Explain with a neat diagram how it can be overcome in a practical differentiator. Design an Op-amp differentiator that will differentiate an input signal with maximum frequency f max =100 Hz . (8)

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13. (a) (i) With a neat diagram explain the variable transconductance

technique in analog multiplier and give its output equation. (8)

(ii) Briefly explain the working of voltage controlled oscillator. (8)

Or

(b) What are important building block of phase locked loop ( PLL) explain its Working? (16)

---

14. (a) (i) Explain the working of R-2R ladder DAC. (8)

(ii) Explain the working of success approximation ADC. (8)

Or

(b) (i) A dual slope ABC uses a 16-bit counter and a 4 MHz clock rate. The maximum input voltage is +10V. The maximum integrator output voltage should be -8V when the counter has recycled through 2n counts. The capacitor used in the integrator is 0.1µF . Find the value of resistor R of the integrator. (8)

(ii) What is a sample and hold circuit? Briefly explain its construction and application. (8)

---

15. (a) (i) How is voltage regulators classified? Explain a series voltage regulator. (8)

(ii) What is an optocoupler? Briefly explain its characteristics. (8)

Or

(b) With a neat circuit diagram and internal functional diagram explain the working of 555 timers in astable mode. (16)

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Communication Theory–April / May 2010 Question Paper

Anna University

B.E./B.Tech.Degree Examinations,Apr/May 2010

---

Regulations 2008

Fourth Semester

Electronics and Communication Engineering

EC2252 Communication Theory

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Time: Three Hours

Maximum: 100 Marks

Answer ALL Questions

Part A - (10 x 2 = 20 Marks)

1. How many AM broadcast stations can be accommodated i n a 100 kHz bandwidth if t he highest frequency modulating a carrier i s 5 kHz?

2. What are the causes of linear distortion?

3. Draw t he block diagram of a method for generating a narrowband FM signal.

4. A carrier wave of frequency 100 MHz i s frequency modulated by a signal 20 sin(200π × 103t).

What i s bandwidth of FM signal if the frequency sensitivity of t he modulation is 25kH z/V .

5. When i s a random process called deterministic?

6. A receiver connected to a n antenna of resistance of 50Ω has an equivalent noise resistance of 30Ω. Find the receiver noise figure.

7. What are t he characteristics of super heterodyne receivers?

8. What a re the methods to improve FM threshold reduction?

9. Define entropy function.

10. Define Rate Bandwidth an d Bandwidth efficiency.

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Part B - (5 x 16 = 80 Marks)

11. (a) (i) Draw an envelope detector circuit used for demodulation of AM an d ex- plain its operation. (10)

(ii) How SSB can be generated using Weaver’s method? Illustrate with a neat block diagram. (6)

OR

11. (b) (i) Discuss i n detail about frequency translation and frequency division multiplexing technique with diagrams. (10)

(ii) Compare Amplitude Modulation and Frequency Modulation. (6)

12. (a) (i) Using suitable Mathematical analysis show that FM modulation produces infinite sideband. Also deduce an expression for the frequency modulated output and its frequency spectrum. (10)

(ii) How can you generate an FM from PM and PM from FM? (6)

OR

12. (b) (i) A 20 MHz i s frequency modulated by a sinusoidal signal such that t he maximum frequency deviation is 100 kHz. Determine the modulation index and approximate bandwidth of t he FM signal for t he following modulating signal frequencies,

(1) 1 kHz (2) 100 kHz and (3) 500 kHz. (8)

(ii) Derive the time domain expressions of FM and PM signals. (8)

13. (a) (i) Give a random process, X (t) = A cos(ωt + θ), where A an d ω a re constants and θ i s a uniform random variable. Show that X (t) is ergodic in both mean and autocorrelation. (8)

(ii) Write a short note on shot noise and also explain about power spectral density of shot noise. (8)

OR

13. (b) Write t he details about narrow band noise and t he properties of quadrature components of narrowband noise. (16)

14. (a) Derive a n expression for SNR at input (SNRc ) and output of (SNRo) of a coherent detector. (16)

OR

14. (b) (i) Explain pre-emphasis and De-emphasis i n detail. (10)

(ii) Compare the performances of AM and FM systems. (6)

15. (a) (i) Find the code words for five symbols of t he alphabet of a discrete memory- less source with probability {0.4, 0.2, 0.2, 0.1, 0.1}, using Huffman coding and determine the source entropy and average code word length. (10)

(ii) Discuss the source coding theorem. (6)

OR

15. (b) (i) Derive t he channel capacity of a continuous band limited white Gaussian noise channel. (10)

(ii) Discuss about rate distortion theory. (6)

COMMUNICATION THEORY - May / June 2009 Question Paper

Anna University

B.E / B.Tech. DEGREE EXAMINATION, MAY/JUNE 2009.

Fifth Semester

Electronics and Communication Engineering 

EC 1301— COMMUNICATION THEORY 

(Regulation 2004)

(Common to B.E. (Part-Time) Fourth Semester — Regulation 2005)

Time : Three hours

Maximum: 100 marks

Answer ALL questions.

PART A  -(10 x 2 = 20 marks)

1. Compute the bandwidth of the Amplitude Modulated signal

2. In a Superheterodyne Receiver used for AM demodulation, the If frequency is 455 KHz. If it is required to receive an AM signal centred around 1050 KHz and bandwidth 10 KHz, give the characteristics of the Image rejectionfilter for a suitable choice of Local oscillator frequency.

3. Obtain the bandwidth of the FM signal

4. What do you understand by FM stereo multiplexing? .

5. A white noise has a power spectral density of —170 dBm/Hz. Calculate the
power at the output of a Band Pass Filter of center frequency 120 MHz and
bandwidth 20 KHz if white noise is fed as the input.

6. Give the characteristics of Shol Noise.

7. Compare the noise performance of AM and FM systems.8. What is threshold effect in FM?

9. Calculate the entropy of the source if the symbol set is (s ,s2,s3,s4 J and the corresponding probabilities are (0.2,0.3,0.05,0.45).

10. State Channel coding theorem.

PART B - (5x16=80marks)

11. (a) Give the method for generation of AM, DSBSC and SSB waves. (16)

Or

(b) (i) Discuss the operation of Costas Loop in detail. (8)

(ii) Draw the block diagram for FDM and explain. (8)

12. (a) Discuss on FM demodulation using PLL. (16)

Or

(b) (i) Give the method of Generàtion of FM signal. (6)

(ii) Derive the expression for the spectrum of a FM signal with single
tone modulation. (10)

13. (a) Give the detailed noise analysis of a SSB receiver using coherent
detection. (16)

Or

(b) Define Narrow b

and noise. List the properties of narrow band noise and 

give a brief explanation of each of them. (16)

14. (a) Derive the expression for the Power spectral density at the output of a FM discriminator when the received signai is corrupted by additive white Gaussian Noise. (16)

Or

(b) (i) Discuss Pre-emphasis and De-emphasis in FM. (6)

(ii) Discuss the threshold effect in an envelope detector used in an AM receiver. (10)

15. (a) Discuss the various techniques used for compression of information. (16)

Or

(b) (i) Define Differential entropy. (2)

(ii) Define Mutual Information. (2)
(iii) What is the relation between Mutual Information and Channel
Capacity? - (1)
(iv) Give the (Shannon-Hartley) information capacity theorem and
discuss the implication of the same in detail. (11)

Linear Integrated Circuits (ECE) - May / June 2009 Question Papers

B.E. / B.Tech. DEGREE EXAMINATION, MAY/JUNE 2009

Fourth Semester

(Regulation 2004)

Electronics and Communication Engineering

Previous Year Question Paper

EC 1254 — LINEAR INTEGRATED CIRCUITS

(Common to B.E. (Part-Time) Third Semester Regulation 2005)

Time : Three hours

Maximum: 100 marks
Answer ALL questions.

PART A (10 x 2 = 20 marks)

1. Define the terms input bias current and input offset voltage.
2. Mention the characteristics of an ideal opamp.
3. Determine the output voltage Vo for the following circuit shown in figure.

4. Draw the circuit diagram of an opamp integrator. Why integrators are preferred over differentiators in analog computers?
5. What is a zero crossing detector?
6. Draw the basic functional diagram of a PLL circuit.
7. Find the resolution of a 12 bit DIA converter.
8. What is a Gilbert cell?
9. What are the requirements for designing a video amplifier?
10. What is a switched capacitor filter? Mention its applications.

PART B (5x 16 =8O marks)

11. (a) (i) Briefly explain the method of using constant current bias for
increasing CMRR in differential amplifier. (10)
. (ii) State the difference between constant current bias and current
mirror in differential amplifier. (6)

Or

(b) (i) Discuss frequency compensation in operational amplifier. (8)
(ii) Define slew rate and describe a method to improve slew rate. (8)

12. (a) (i) With diagram explain the principle of operation of triangular waveform generator using opamp. (10)
(ii) Design an opamp circuit to give an output voltage
V0 = 3V1 —2V2 + 5V3 where V1, V2 and V3 are inputs. (6)

Or

(b) (i) Design a second order low pass filter. (6)
(ii) Explain the working principle of Schmitt trigger. (10)

13. (a) (i) With block diagram explain how PLL can be used as frequency
multiplier circuit. (6)
(ii) Write a technical note on compander ICs. (10)

Or

(b) Explain the working principle of variable transconductance multiplier. (16)

14. (a) (i) With a neat diagram explain the working principle of successive
approximation type A/D converter. (10)
(ii) Discuss different types of analog switches. (6)

Or

(b) (i) Draw the circuit diagram of DIA converter 0800 and explain its
features. (8)
(ii) Discuss the functions of voltage to time converters. (8)

15. (a) Briefly explain the working principle of switch mode power supply with
necessary circuit diagram and waveforms.

Or

(b) With a functional diagram, explain the working principle of 8038 IC function generator.

Numerical Methods - Nov / Dec 2006 Question Paper

Anna University

Numerical Methods

November / December 2006 Question Paper

B.E /B.Tech. DEGREE Examination NOVEMBER - DECEMBER 2006.

Fourth Semester

Civil Engineering

MA 1251— NUMERICAL. METHODS

Download :

• NM-Nov / Dec 2006.pdf (1.2 mb)

Electrical Machines–1–April / May 2010 Question Paper

Anna University

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010.

Fourth Semester

Electrical and Electronics Engineering EE2251 — ELECTRICAL MACHINES – I

(Regulation 2008)

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Time: Three hours

Maximum: 100 Marks

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Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. Define Torque.

2. How is emf induced dynamically?

3. Give the principle of transformers.

4. What are the conditions for parallel operation of transformers?

5. In a linear system prove that field energy and co-energy are equal.

6. Write an expression for the stored energy in the magnetic field.

7. What are the basic magnetic field effects that result in the production of mechanical forces?

8. What are the assumptions made to determine the distribution of coil mmf?

9. What is armature reaction?

10. What are the methods of speed control in DC motor?

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PART B — (5 × 16 = 80 Marks)

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11. (a) Discuss in detail the following: (i) B-H relationship

(ii) Leakage flux

(iii) Fringing

(iv) Stacking factor. (4 × 4 = 16)

Or

(b) (i) Derive an expression for energy density in the magnetic field. (6)

(ii) Explain in detail ‘‘Eddy – current loss’’. (5)

(iii) The total core loss of a specimen of silicon steel is found to be 1500 W at 50 Hz. Keeping the flux density constant the loss becomes 3000 W when the frequency is raised to 75 Hz. Calculate separately the hysteresis and eddy current loss at each of there frequencies. (5)

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12. (a) (i) Draw the equivalent circuit of single phase transformer and draw the necessary phasor diagram under load

(1) Resistive (2) Inductive (3) Capacitive. (8)

(ii) Explain in detail the tests required to obtain the equivalent circuit parameters of transformer. (8)

Or

(b) (i) Explain in detail the various types of three phase transformer connection. (10)

(ii) Prove that amount of copper saved in auto transformer is (1 – K)times that of ordinary transformer. (6)

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13. (a) (i) Derive an expression for mechanical force in terms of field energy. (8)

(ii) Discuss the flow of energy in electromechanical devices in detail. (8)

Or

(b) (i) Derive an expression for torque in case of a multiply excited magnetic field system. (8)

(ii) Two coupled coils have self and mutual inductance of

over a certain range of linear displacement x. The first coil is excited by a constant current of 20A and the second by a constant current of –10A.

Find:

(1) Mechanical work done if x changes from 0.5 to 1 m.

(2) Energy supplied by each electrical source in part (a).

(3) Change in field energy. (8)

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14. (a) Explain in detail the basic concept of a synchronous generator with a neat diagram and the necessary space wave form. (16)

Or

(b) (i) Discuss the basic concept of emf generation in a DC machine in detail. (8)

(ii) What is MMF space wave of a single coil and in a distributed winding? (8)

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15. (a) (i) Explain armature reaction and commutation in detail. (8)

(ii) Draw the

(1) OCC characteristics of DC generator and (4)

(2) External characteristics of DC generator. (4)

Or

(b) (i) Explain in detail the various methods of speed control in DC motor. (8)

(ii) What are the various starting methods of DC motor? Explain any one method. (8)

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Operating Systems - April / May 2010 Question Paper

Anna university

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Computer Science and Engineering

CS2254 — OPERATING SYSTEMS

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 Marks
Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. Mention the objectives and functions of an operating system.
2. Define thread. Differentiate user threads from kernel threads.
3. What is a semaphore? State the two parameters.
4. What is deadlock? What are the schemes used in operating system to handle
deadlocks?
5. Differentiate a page from a segment.
6. What is meant by thrashing? Give an example.
7. Mention the objectives of file management system.
8. Differentiate the various file access methods.
9. What is the need for disk scheduling?
10. What does swap-space management mean?

PART B — (5 × 16 = 80 Marks)

11. (a) (i) Explain the operating system structure and its components. (Marks 8)
(ii) Explain briefly IPC in Linux. (Marks 8)

Or

(b) (i) Explain Process Control Block. (Marks 4)

(ii) Describe the differences among short-term, medium-term, and long-term scheduling. (Marks 4)

(iii) Describe the Inter Process communication in client-server systems. (8)

12. (a) (i) Distinguish between preemptive and non-preemptive scheduling. Explain each type with an example. (Marks 8)
(ii) What is synchronization? Explain how semaphores can be used to deal with n-process critical section problem. (Marks 8)

Or

(b) (i) Discuss the issues in multiprocessor and real-time scheduling. (Marks 8)

(ii) Explain Banker's deadlock-avoidance algorithm with an illustration. (Marks 8)

13. (a) (i) Discuss how memory is allocated in variable partition multiprogramming. (Marks 6)
(ii) Explain memory management in Linux. (Marks 10)

Or

(b) (i) Discuss segmentation in detail. Compare it with paging. (Marks 8)
(ii) Explain FIFO, LRU and Second-chance page replacement algorithms with an example reference string. (Marks 8)

14. (a) (i) Explain linked file allocation method. (Marks 6)
(ii) Describe Windows XP file system in detail. (Marks 10)

Or

(b) (i) What is the role of Access matrix for protection? Explain. (Marks 5)
(ii) What is meant by free space management? Explain. (Marks 5)
(iii) Explain the directory structure of Linux operating system. (Marks 6)

15. (a) (i) Explain the services provided by a kernel I/O subsystem. (Marks 8)
(ii) Explain and compare the C-LOOK and C-SCAN disk scheduling
algorithms. (Marks 8)

Or

(b) (i) Write an elaborate note on RAID. (Marks 6)
(ii) Explain in detail the salient features of Linux I/O. (10) 

COMPUTER ORGANIZATION AND ARCHITECTURE - April / May 2010 Question Paper

Anna University

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010 

Fourth Semester 

Computer Science and Engineering 

CS2253 — COMPUTER ORGANIZATION AND ARCHITECTURE (Common to Information Technology) 

(Regulation 2008) 

Time: Three hours

Maximum: 100 Marks

Answer ALL Questions

PART A — (10 × 2 = 20 Marks)
1. Distinguish between autoincrement and autodecrement addressing mode.
2. Compare RISC with CISC architecture.
3. Under what situations the micro program counter is not incremented after a new instruction is fetched from micro program memory?
4. What are the relative merits of horizontal and vertical microinstruction format?
5. What is pipelining and what are the advantages of pipelining?
6. List the key aspects in gaining the performance in pipelined systems.
7. How many memory chips are needed to construct 2 M × 16 memory system using 512 K × 8 static memory chips?
8. What is virtual memory and what are the benefits of virtual memory?
9. What is meant by bus arbitration?
10. Name and give the purpose of widely used bus standard.

PART B — (5 × 16 = 80 Marks)

11. (a) (i) Describe the role of system software to improve the performance of a computer. (8) 

(ii) Design a 4-bit adder/subtracter circuit using full adders and explain its function. (8)

Or

(b) (i) What are the special registers in a typical computer? Explain their purposes in detail. (8)

(ii) Design a 4-bit fast adder and explain its function in detail. (8)

12. (a) (i) Draw and explain the block diagram of a complete processor. (6) 

(ii) Briefly describe the design of a hardwired control unit. (10)

Or

(b) (i) Explain the basic organization of a microprogrammed control  unit and the generation of control signals using microprogram. (12) 

(ii) What are the advantages and disadvantages of hardwired and microprogrammed control? (4)

13. (a) (i) Describe the role of cache memory in pipelined system. (8)

(ii) Discuss the influence of pipelining on instruction set design. (8)

Or

(b) What is instruction hazard? Explain the methods for dealing with the instruction hazards. (16)

14. (a) (i) What are the different secondary storage devices? Elaborate on any one of the devices. (8)
(ii) Explain how the virtual address is converted into real address in a paged virtual memory system. (8)

Or

(b) (i) Explain approaches for addressing multiple-module memory systems with suitable diagrams. (6)
(ii) Briefly describe magnetic disk principles and also the organization and accessing of data on a disk. (10)

15. (a) (i) Describe the hardware mechanism for handling multiple interrupt requests. (8)
(ii) What are handshaking signals? Explain the handshake control of data transfer during input and output operation. (8)

Or

(b) (i) What are the needs for input-output interface? Explain the functions of a typical 8-bit parallel interface in detail. (10)

(ii) Describe the USB architecture with the help of a neat diagram. (6)

MICROPROCESSORS AND MICROCONTROLLERS - April / May 2010

Anna University

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010 

Fourth Semester 

Computer Science and Engineering 

CS2252 — MICROPROCESSORS AND MICROCONTROLLERS (Common to Information Technology) 

(Regulation 2008) 

Time: Three hours Maximum: 100 Marks

Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. Assume that the accumulator contains data bytes 82H and the instruction MOV C, A (4FH) is fetched. List the steps in decoding and executing the instruction.

2. What are the second bytes in the instruction IN and OUT of  8085 microprocessor? 

3. Draw the 8086 flag register format.

4. List different types of 8086 hardware interrupts.

5. Compare closely coupled configuration with loosely coupled configuration.

6. Mention the need for co-processor in a microprocessor based system.

7. Can an input port and an output port have the same port address? Justify.

8. Why is each channel in DMA controller restricted to 16K bytes of data transfer?

9. With XTAL = 11.0592 MHz, what value should be loaded into TH1 to have 9600 baud rate?

10. How do you select the register bank in 805l microcontroller?


PART B — (5 × 16 = 80 Marks)

11. (a) (i) Write an 8085 assembly language program with flowchart for the following: Six bytes are stored in memory locations starting at XX50H. Add all the data bytes. Use register B to save any carry generated while adding the data bytes. Store the sum at two consecutive memory locations, XX70H and XX7IH. Data (H): A2, FA, DF, E5, 98, 8B. (8)

(ii) Write a program to generate a continuous square wave with the period of 500µ s . Assume the system clock period is 325ns and use bit D0 to output the square wave. (8)

Or (b) (i) Explain the following 8085 instructions with JP, JPO, CM, RPE. DAA, XCHG. SPHL and PCHL. an example (8)

(ii) Draw the timing diagram for the MVI A, 32h and OUT 01h. instruction (8)

12. (a) (i) Draw the internal block explain. diagram of 8086 microprocessor and explain (8)
(ii) Explain any eight assembler directives of 8086 microprocessor. (8)

Or

(b) (i) Give three examples for the following 8086 microprocessor instructions: String Instructions, Process Control Instructions, it with 8087 control word and status word formats. (12)

(ii) Give two examples for packed decimal data transfers and integer data transfers of an 8087 Co-processor. (4)

Or 

(i) Program Execution Transfer Instructions. Instructions and Bit Manipulation (12)
(ii) How does one define and microprocessor? Call Macro parameters of 8086 (4)

13. (a) (i) Draw the internal block diagram of 8087 Co-processor and explain

(or)

(b) Draw the architecture of 8089 I/O Co-processor and explain. (16)

14. (a) Draw the block diagram of 8279 Keyboard/Display controller and explain how to interface the Hex Key Pad and 7-segment LEDs using 8279. (16)

Or

(b) (i) Draw the functional block diagram of 8254 timer and explain the different modes of operation. (8)

(ii) Draw the block diagram of 8259A and explain how to 8259A. program (8)

15. (a) (i) Explain the memory structure of an 8051 Microcontroller. (8)

(ii) How does one interface a 16 × 2 LCD Display using 8051 Microcontroller? (8)

Or

(b) (i) Explain the on-chip timer modes of an 8051 Microcontroller. (8)

(ii) Explain how to interface an 8-bit ADC with 8051 Microcontroller. (8)

Design and Analysis of Algorithms–April / May 2010 Question Paper

Anna University

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Computer Science and Engineering

CS2251 — DESIGN AND ANALYSIS OF ALGORITHMS

(Regulation 2008)

Time: Three hours

Maximum: 100 Marks

Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. Differentiate Time Complexity from Space complexity.

2. What is a Recurrence Equation?

3. What is called Substitution Method?

4. What is an Optimal Solution?

5. Define Multistage Graphs.

6. Define Optimal Binary Search Tree.

7. Differentiate Explicit and Implicit Constraints.

8. What is the difference between a Live Node and a Dead Node?

9. What is a Biconnected Graph?

10. What is a FIFO branch-and-bound algorithm?

PART B — (5 × 16 = 80 Marks)

11.	(a)	Explain how Time Complexity is calculated. Give an example.
		Or
	(b)	Elaborate on Asymptotic Notations with examples.

12. (a) With a suitable algorithm, explain the problem of finding the maximum and minimum items in a set of n elements.

Or

(b) Explain Merge Sort Problem using divide and conquer technique. Give an example.

13. (a) Write down and explain the algorithm to solve all pairs shortest paths problem.

Or

(b) Explain how dynamic programming is applied to solve travelling salesperson problem.

14. (a) Describe the backtracking solution to solve 8-Queens problem.

Or

(b) With an example, explain Graph Coloring Algorithm.

15. (a) Explain in detail the Graph Traversals.

Or

(b) With an example, explain how the branch-and-bound technique is used to solve 0/1 knapsack problem.