Showing posts with label DPSD Question Paper. Show all posts
Showing posts with label DPSD Question Paper. Show all posts

Anna University - Digital Principles and System Design (DPSD) - November / December 2011 Question Paper

B.E/B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2011.

Common to B.E./B.Tech. Computer Science and Engineering/Information Technology
Third Semester
141302 - DIGITAL PRINCIPLES AND SYSTEMS DESIGN
(Regulation 2010)


Time : Three hours
Maximum : 100 marks
Answer ALL questions.
PART A — (10 x 2 20 marks)

1. Simplify the expression ((AB’ + ABC)’ + A (B + AB’))’.
2. Find the minimum expression of
Y= π (0,1,3,5,6,7,10,14,15).
3. Draw the full adder circuit as a collection of two half adder.
4. A circuit is to be designed that has one control line and three data lines. When the control line is high, the circuit is to detect when one of the data lines has a 1 on it. No more than one data line will ever have a 1 on it. When the control line is low, the circuit will output a 0, regardless of what is on the data lines.
5. The input frequency of a 7497 binary rate multiplier is 64 K Hz. What will its output be if the multiplier word is 1011?
6. Implement a digital circuit that statistics the following:
7. Given a 8 bit data word 01011011, generate the 13 bit composite word for the Hamming code that corrects single errors and detects double errors.

8. Draw a 4- bit binary synchronous counter with D flip flops.
9. Draw a circuit that has no static hazards and implement the boolean function
F (A, B, C, D) = ∑ (0,2,6, 7, 8, 10, 12)
10. Find a critical race free state assignment for the reduced flow table shown.


PART B - (5 x 16 80 marks)

11 (a) Reduce the expressioi using Quine McCluskey method.
F(x1,x2,x3,x4,x5)=∑m(0, 2,4,5,6,7,8,10,14,17,18,21,29,31) + ∑d (11, 20, 22)

Or

(b) Explain the conversion of regular expression into canonical expression and their simplification in SOP and POS forms.

12. (a) Design a combinational circuit that multiplies by 5 an input decimal digit represented in BCD. The output is also in BCD. Show that the outputs can be obtained from the input lines without using any logic gates.

Or

(b) A circuit receives only valid 5211 or 8421 BCD information and provides two output lines X and Y Design the circuit such that X will provide an output anytime a valid 8421 BCD code appears at the input and Y will provide an output anytime a valid 5211 BCD code appears at the input.

13. (a) Implement the following Boolean function with a 4 X 1 multiplexer and external gates. Connect inputs A and B to the selection lines. The input requirements for the four data lines will be a function of variables C and D these values are obtained by expressing F as a function of C and D for each of the four cases when AB = 00, 01, 10 and 11. These functions may have to be implemented with external gates.
FA,B,C,D)= (1,3,4, 11, 12, 13, 14, 15).

Or

(b) Design a combinational circuit that compares two 4 bit numbers A and B to check if they are equal. The circuit has three output x, y, z so that x =1
if A = B and y= 1 if A < B and z=1 if A > B.

14. (a) (i) Reduce the number of states in the state table and tabulate the
reduced state table.           


(ii) Starting from state a of the state table, find the output sequence generated with an input sequence 01110010011.

Or

(b) Design the following non binary sequence counters as specified in each case. Treat the unused states as don’t care conditions. Analyze the final circuit to ensure that it is self correcting If your design produces a non self correcting counter, modify the circuit to make itself correcting.
(i) Design a counter with the following repeated binary sequence: 0,1,2, 3, 4, 5, 6. Use JK flipflops. 
(ii) Design a counter with the following repeated binary sequence: 0,1,2, 4, 6. Use D ffipflops.
(iii) Design a counter with the following repeated binary sequence: 0 1,3,5,7.  UseT flipflops.

15. (a) A traffic light is installed at a junction of railroad and road. The traffic light is controlled by two switches in the rails placed one mut apart on either side of the junction. A switch is turned on when the train is over it and is turned off otherwise.The train light changes from green (logic -0) to red (logic - 1) when the beginning of the train is one mile from the junction. The light changes back to green when the end of the train is one mile away from the junction. Assume that the length of the train is less than two miles.
(i) Obtain the primitive flow table for the circuit.
(ii) Show that the flow table can be reduced to four rows.      

Or

(b) An asynchronous sequential circuit is described by the following excitation and output functions .
Y = x1x2'+(x1 ± x2')y
Z=y
(i) Draw the logic diagram of the circuit.
(ii) Derive the transition table and output map.
(iii) Obtain 2 state flow table.
(iv) Describe in words the behavior of the circuit.

Anna University - DIGITAL PRINCIPLES AND SYSTEMS DESIGN (DPSD) - April / May 2008 Question Paper

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2008.
Third Semester

(Regulation 2004)
Computer Science and Engineering .

CS 1202 - DIGITAL PRINCIPLES AND SYSTEMS DESIGN
(Common to Information Technology)
(Common to B.E. (Part-Time) Second Semester Regulation 2005)

Time : Three hours
Maximum : 100 marks
Answer ALL questions.

PART A - (10x2=20marks) .

1. What are minterms?
2. Convert the following function into sum of product form
(AB + C) (B + C’D)
3. Convert the following number from one base to other
(65.342)8 = ( )7
4. What is a priority encoder?
5. What is a demultiplexer?
6. Draw the logic diagram for T FlipFlop.
7. What is the maximum range of a memory that can be accessed using 10 address lines?
8. What is modulo - N counter?
9. What is a hazard in combinational circuits?
10. What are the assumptions that must be made for fundamental mode circuit?

PART B—(5x16=80 marks)

11. (a) Using Tabulation method simplify the Boolean function
F (V, W, X, Y, Z) =∑(O, 1, 8, 11, 12, 15, 20, 21, 22, 24, 29, 31) which has the don’t care conditions d (9, 18, 30). (16)

Or

(b) (j) Simplify the Boolean function using map method:
F (w, x, y, z) = ∑(O, 2, 4, 6,8, 10, 12, 14) (10)

(ii) Perform subtraction on the following numbers using the 9's complement of the subtrahend
(1) 5763-3145
(2) 59-9876
(3) 5200-561. (6)

12. (a) (i) Design a combinational circuit to convert gray code to BCD. (12)

(ii) What are the designprocedures of combinational circuit? (4)

Or

(b) (i) Design a combinational circuit to convert BCD code to Excess-3 code. (12)

(ii) Design a 3 bit Adder. (4)

13. (a) (i) • Implement the Boolean function using 4 : 1 multiplexer
F (W, X, Y, Z) = ∑ (l, 2, 3, 6, 7, 8, 11, 12,14)                              (8)

(ii) A combinational circuit is defined by the functions
F1=∑(1,3,5)
F2=∑(5,6,7) .
Implement the circuit with a PLA having 3 inputs, 3 product terms
and two outputs. (8)

Or

(b) Construct a BCD adder circuit and write a HDL program module for the same. (16)
14. (a) Explain the different types of shift registers with neat diagram. (16)

Or

(b) Design a sequence detector to detect the sequence 101011.

15. (a) An asynchronous sequential circuit is described by the following excitation and output function
X = (Yi Zi’W2) X + (Yi’Z1W’2)
s=x,
(i) Draw the logic diagram of the circuit
(ii) Derive the transition table and output map
(iii) Describe the behavior of the circuit. (16)

Or

(b) Explain essential, static and dynamic hazards in digital circuit. Give hazard-free realization for the following Boolean function. (16)
F(I,J,K,L)= ∑ m(1,3,4,5,6, 7,9, 11, 15)