Linear Integrated Circuits– Question Bank Two marks with Answers
Anna University
QUESTION BANK ANSWERS (2 MARKS)
147404 - LINEAR INTEGRATED CIRCUITS
This Section includes all units of LIC two marks with answers.
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Two Marks with Answers:
LIC–Special Function IC (Unit 5)–Two marks
Anna University
QUESTION BANK ANSWERS (2 MARKS)
147404 - LINEAR INTEGRATED CIRCUITS
UNIT-V
SPECIAL FUNCTION INTEGRATED CIRCUITS
1. What are the operating modes of a 555 timer?
a. Monostable mode
b. Astable mode
2. List out the applications of 555 timer?
a. Oscillator
b. pulse generator
c. ramp and square wave generator d. mono-shot multivibrator
e. burglar alarm
f. traffic light control.
3. Define sink current and source current?
Sink current: When the output is low, the load current that flows through the load connected between Vcc and o/p terminal is called sink current.
Source current: When the output is high, the load current that flows through the load connected between ground and o/p terminal is called source current.
4. Define normally ON load and normally OFF load?
Normally ON load: The load connected between VCC and output terminal. Normally OFF load: The load connected between output terminal and ground.
5. What is the use of reset pin of 555
timer?
This is an interrupt for the timing device when pin 4 is grounded, it stops the working of device and makes it off.
6. What is the purpose of control voltage pin (5) of 555 timer?
This pin is the inverting input terminal of comparator. This is reference level for comparator with which threshold is compared. If reference level is other than 2/3 VCC, then external input is to be given to pin 5. Pulse width modulation is possible due to pin 5.
7. List out the major blocks of 555 timer functional diagram?
The IC 555 timer combines the following elements.
1) A relaxation oscillator
2) RS flip-flop
3) Two comparators
4) Discharge transistor
8. Define duty cycle?
It is defined as the ratio of on time to the total time of one cycle. D = W/ T
W – time for output is high = TON
T – total time of one cycle.
9. Write the expression for pulse width of 555 timer in monostable mode?
Pulse width W = 1.1 RC seconds
R – resistor in ohms, C – capacitor in farads
10. Write the expression for total time period of 555 timer in astable mode?
T = 0.693 (RA + 2 RB) C seconds
11. What is the frequency of oscillation of free running mode of 555 timer?
F = 1.44/ (RA + 2 RB) C Hz
12. List out the applications of 555 timer in astable mode.
a. missing pulse detector b. Linear ramp generator c. Frequency divider
d. Pulse width modulation.
13. List out the applications of 555 timer in monostable mode.
a. FSK generator
b. Pulse-position modulator
14. Define voltage regulators and give the types?
A voltage regulator is an electronic circuit that provides a stable dc voltage independent of the load current, temperature, and ac line voltage variations.
The classification of voltage regulators:
*Series / Linear regulators
*Switching regulators.
15. What do you mean by linear voltage regulators?
Series or linear regulator uses a power transistor connected in series between the unregulated dc input and the load and it conducts in the linear region .The output voltage is controlled by the continuous voltage drop taking place across the series pass transistor.
16. Define switched voltage regulators?
Switching regulators are those which operate the power transistor as a high frequency on/off switch, so that the power transistor does not conduct current continuously. This gives improved efficiency over series regulators.
17. What are the advantages of adjustable voltage regulators over the fixed voltage regulators?
i) Improved line and load regulation by a factor of 10 or more.
ii) Because of the improved overload protection, greater load current can be drawn.
iii) Improved reliability.
18. List out the parameters related to the fixed voltage regulators?
1) Line regulation
2) Load regulation
3) Ripple rejection
4) Output impedance
5) Maximum power dissipation
6) Rated output current
19. Define dropout voltage of a fixed voltage regulator?
It is the minimum voltage that must exist between input and output terminals. For most of regulators, it is 2 to 3 volts.
20. What is an opto-coupler IC? Give examples.
Opto-coupler IC is a combined package of a photo-emitting device and a photosensing device.
Examples for opto-coupler circuit : LED and a photo diode,
LED and photo transistor, LED and Darlington.
Examples for opto-coupler IC : MCT 2F , MCT 2E .
21. Mention the advantages of opto-couplers.
*Better isolation between the two stages.
*Impedance problem between the stages is eliminated.
*Wide frequency response.
*Easily interfaced with digital circuit.
*Compact and light weight.
*Problems such as noise, transients, contact bounce,.. are eliminated.
22. What is an isolation amplifier?
An isolation amplifier is an amplifier that offers electrical isolation between its input and output terminals.
LIC–AD and DA Converters (Unit 4)–2 Marks
Anna University
QUESTION BANK ANSWERS (2 MARKS)
147404 - LINEAR INTEGRATED CIRCUITS
UNIT-IV
ANALOG TO DIGITAL AND DIGITAL TO ANALOG CONVERTERS
1. Explain the operation of basic sample and hold circuit.
A typical sample and hold circuit stores electric charge in a capacitor and contains at least one fast FET switch and at least one operational amplifier. To sample the input signal the switch connects the capacitor to the output of a buffer amplifier. The buffer amplifier charges or discharges the capacitor so that the voltage across the capacitor is practically equal, or proportional to, input voltage. In hold mode the switch disconnects the capacitor from the buffer. The capacitor is invariably discharged by its own leakage currents and useful load currents, which makes the circuit inherently volatile, but the loss of voltage (voltage droop) within a specified hold time remains within an acceptable error margin.
2. State the advantages and applications of sample and hold circuits.
A sample and hold circuit is one which samples an input signal and holds on to its last sampled value until the input is sampled again. This circuit is mainly used in digital interfacing, analog to digital systems, and pulse code modulation systems.
3. List the drawbacks of binary weighted resistor technique of D/A conversion.
a) Wide range of resistor values needed
b) Difficulty in achieving and maintaining accurate ratios over a wide range of variations
4. What is the advantage and disadvantages of flash type ADC?
Flash type ADC is the fastest as well as the most expensive.
The disadvantage is the number of comparators needed almost doubles for each added bit (For a n-bit convertor 2(n-1) comparators, 2n resistors are required).
5. The basic step of a 9 bit DAC is 10.3 mV. If 000000000 represents 0Volts, what is the output for an input of 101101111?
The output voltage for input of 101101111 is
= 10.3 mV (1*28+0*27+1*26+1*25+0*24+1*23+1*22+1*21+1*20)
= 10.3 * 10-3 * 367 = 3.78 V
6. Why does the dual slope ADC provide excellent noise rejection of AC signal whose periods are integral multiples of the integration time?
7. Find the resolution of a 12 bit DAC converter.
Resolution (volts) = VFS/(212-1) = I LSB increment
VFS – Full scale voltage
8. What are the advantages and disadvantages of R-2R ladder DAC.
Advantages:
a) Easier to build accurately as only two precision metal films are required.
b) Number of bits can be expanded by adding more sections of same R/2R values.
Disadvantage:
a) In this type of DAC, when there is a change in the input, changes the current flow in the resistor which causes more power dissipation which creates non-linearity in DAC.
9. Define start of conversion and end of conversion.
Start of Conversion in ADC (SOC): This is the control signal for start of conversion which initiates A/D conversion process.
End of Conversion in ADC (EOC): This is the control signal which is activated when the conversion is completed.
10. What are the types of ADC and DAC.
Types of ADC:
1. Flash (comparator) type converter
2. Counter type converter
3. Tracking or servo converter
4. Successive approximation type converter
Types of DAC:
1. Weighted resistor DAC
2. R-2R Ladder
3. Inverted R-2R Ladder
11. What is the difference between direct ADC and integrating type ADC.
a) The integrating type of ADC’s do not need a sample/Hold circuit at the input.
b) It is possible to transmit frequency even in noisy environment or in an isolated form.
12. Define following performance parameters of D/A converters: (8)
a) Resolution
The resolution of a converter is the smallest change in voltage which may be produced at the output or input of the converter.
Resolution (in volts)= VFS/2n-1=1 LSB increment. The resolution of an ADC is defined as the smallest change in analog input for a one bit change at the output.
b) Accuracy
Absolute accuracy:
It is the maximum deviation between the actual converter output & the ideal converter output.
Relative accuracy:
It is the maximum deviation after gain & offset errors have been removed.
The accuracy of a converter is also specified in form of LSB increments or % of full scale voltage.
c) Monotonicity
A monotonic DAC is one whose analog output increases for an increase in digital input.
d) Conversion time
It is defined as the total time required to convert an analog signal into its digital output. It depends on the conversion technique used & the propagation delay of circuit components.
The conversion time of a successive approximation type ADC is given by
T(n+1)
where T---clock period
Tc---conversion time n----no. of bits
LIC–Analog Multiplier and PLL (Unit 3)–2 Marks with Anwers
Anna University
QUESTION BANK ANSWERS (2 MARKS)
147404 - LINEAR INTEGRATED CIRCUITS
UNIT III
ANALOG MULTIPLIER AND PLL
1. List out the blocks of PLL.
a. Phase detector/comparator
b. Low pass filter
c. Error amplifier
d. Voltage controlled oscillator
2. Define the following terms related to PLL, a) Capture range
The range of frequencies over which the PLL can acquire lock with an input signal is called the capture range. It
is expressed as a percentage of the VCO free running frequency.
b) Lock range
The range of frequencies over which the PLL can maintain lock with the incoming signal is called the lock-in range or tracking range. It is expressed as a percentage of the VCO free running frequency.
3. Write the expression of a) capture range
b) lock range
Lock in range ∆fL = +/- 7.8 fo / V
fo is free running frequency
Capture range = +/- = [∆fL / (2*∏*R*C)] 1/2
4. Define voltage to frequency conversion factor of VCO.
Voltage to Frequency conversion factor is defined as,
Kv= ∆fo / ∆Vc = 8fo /Vcc
where, ∆Vc is the modulation voltage required to produce the frequency shift ∆fo
5. Mention the applications of analog multipliers.
1. Voltage squarer
2. Frequency doubler
3. Voltage divider
4. Square rooter
5. Phase angle detector
6. Rectifier
6. List out the applications of PLL.
a. Frequency multiplication/division
b. Frequency translation c. AM detection
d. FM demodulation
e. FSK demodulation.
7. Define phase transfer conversion coefficient of PLL.
The covertion ratio Kd of phase detector is given by
Kd = Vcc/Ï€
8. Briefly write on frequency synthesizers.
A frequency synthesizer is an electronic system for generating any of a range of frequencies from a single fixed time base or oscillator. They are found in many modern devices, including radio receivers, mobile telephones, radiotelephones, walkie-talkies, CB radios, satellite receivers, GPS systems, etc. A frequency synthesizer can combine frequency multiplication, frequency division, and frequency mixing (the frequency mixing process generates sum and difference frequencies) operations to produce the desired output signal.
9. Explain how a frequency doubler can be realized using analog multiplier.
The multiplication of two sine waves of the same frequency, but of possibly different amplitudes and phase allows doubling a frequency using an analog multiplier.
10. What is a compander IC?
The term companding means compressing and expanding. In a communication system, the audio signal is compressed in the transmitter and expanded in the receiver. Examples: LM 2704- LM 2707; NE 570/571.
11. What is a peak detector?
A peak detector is a series connection of a diode and a capacitor outputting a DC voltage equal to the peak value of the applied AC signal.
LIC–Application of OP-Amp (Unit 2)–Two Marks with Answers
Anna University
QUESTION BANK ANSWERS (2 MARKS)
147404 - LINEAR INTEGRATED CIRCUITS
UNIT-II
APPLICATIONS OF OPERATIONAL AMPLIFIERS
1. Give some applications of Comparator.
a. Zero crossing detector b. Window detector
c. Time marker generator d. Phase detector
2. What is a window detector?
A device, usually consisting of a pair of voltage comparators, in which output indicates whether the measured signal is within the voltage range bounded by two different thresholds (an "upper" threshold and a "lower" threshold).
3. List the types of comparators.
Inverting comparator
Non-inverting comparator
4. Differentiate Schmitt trigger and comparator.
A Schmitt trigger is a comparator with a small amount of positive feedback applied to create a hysteresis for the input level.
5. What are the limitations of an ideal active differentiator?
At high frequency, differentiators may become unstable and break into oscillation. The input impedance i.e. (1/ωC1) decreases with increase in frequency, thereby making the circuit sensitive to high frequency noise.
6. State the important features of an instrumentation amplifier.
a. high gain accuracy b. high CMRR
c. high gain stability with low temperature co-efficient d. low dc offset
e. low output impedance
7. How does the precision rectifier differ from the conventional rectifier?
These rectifiers are used to rectify very small voltages or currents for which the diode never gets forward biased in the conventional one. i.e. voltage or currents are always less than .7V which can not be rectified by normal rectifiers.
This rectifier doesn’t give any kind of drop in output since diodes are previously biased using op-amp.
8. What are the advantages of active filters over the passive filters?
Active filters use amplifying elements, especially op amps, with resistors and capacitors in their feedback loops, to synthesize the desired filter characteristics. Active filters can have high input impedance, low output impedance, and virtually any arbitrary gain.
They are also usually easier to design than passive filters. Possibly their most important attribute is that they lack inductors, thereby reducing the problems associated with those components.
9. Draw the freq. response of the LPF.
10. What is an antilog amplifier? Draw the circuit of an antilog amplifier.
Antilog amplifier is a decoding circuit to convert a logarithmically encoded signal back to the real signal.
11. What is a V to C convertor?
A transconductance amplifier (gm amplifier) puts out a current proportional to its input voltage. In network analysis, the transconductance amplifier is defined as a voltage controlled current source (VCCS) .
For direct current, transconductance is defined as follows:
12. Draw the circuit of an integrator.
13. Why integrators are preferred over differentiators in analog computers?
Integrators are more linear than the differentiators and the integrators reduce the power consumption than the high pass filter.
LIC–IC Fabrication (Unit 1) 2 Marks with answers
QUESTION BANK ANSWERS (2 MARKS)
147404 - LINEAR INTEGRATED CIRCUITS
UNIT-I
IC FABRICATION AND CIRCUIT CONFIGURATION FOR LINEAR ICS
1. Mention the advantages of integrated circuits.
*Miniaturisation and hence increased equipment density.
*Cost reduction due to batch processing.
*Increased system reliability due to the elimination of soldered joints.
*Improved functional performance.
*Matched devices.
*Increased operating speeds.
*Reduction in power consumption.
2. Write down the various processes used to fabricate IC’s using silicon planar technology.
*Silicon wafer preparation.
* Epitaxial growth
*Oxidation.
*Photolithography.
*Diffusion.
*Ion implantation.
*Isolation.
*Metallisation.
*Assembly processing and packaging.
3. What is the purpose of oxidation?
*SiO2 is an extremely hard protective coating and is unaffected by almost all reagents.
*By selective etching of SiO2, diffusion of impurities through carefully defined windows can be accomplished to fabricate various components.
4. Why aluminum is preferred for metallization?
*It is a good conductor.
*it is easy to deposit aluminium films using vacuum deposition.
*It makes good mechanical bonds with silicon.
*It forms a low resistance contact.
5. What are the popular IC packages available?
a. Metal can package.
b. Dual-in-line package. c. Ceramic flat package.
6. Define an operational amplifier.
An operational amplifier is a direct-coupled, high gain amplifier consisting of one or more differential amplifier. By properly selecting the external components, it can be used to perform a variety of mathematical operations.
7. List out the ideal characteristics, and draw the equivalent diagram of an OP-AMP
* Open loop voltage gain is infinity.
*Input impedance is infinity.
*Output impedance is zero.
*Bandwidth is infinity.
*Zero offset.
8. Define Virtual ground property of an OP-AMP
A virtual ground is a ground which acts like a ground. It may not have physical connection to ground. This property of an ideal op-amp indicates that the inverting and non-inverting terminals of op-amp are at the same potentials. The non-inverting input is grounded for the inverting amplifier circuit. This means that the inverting input of the op-amp is also at ground potential.
9. Draw the voltage follower circuit of an OP-AMP
10. Define the following parameters as applied to an op-amp:
i) Input bias current
Input bias current IB is the average of the currents that flow into the inverting and non-inverting input erminals of the op-amp.
i.e. IB = (IB1+IB2)/2
ii) Input offset current
The algebraic difference between the current into the inverting and non-inverting terminals is referred to as input offset current Iio. Mathematically it is represented as Iio = |IB - IB |
Where
I B+is the current into the non-inverting input terminals.
IB- is the current into the inverting input terminals.
iii) Input offset voltage
This is the voltage required to be amplified at the input for making output voltage to zero volts.
iv) C.M.R.R
The common mode rejection ratio (CMRR) can be defined as the ratio of differential gain to common mode gain.
CMRR = |Ad/Ac|
v) P.S.R.R
Power Supply Rejection Ratio (PSRR) is the ability of an amplifier to maintain its output voltage as its
DC power-supply voltage is varied.
PSRR = (change in Vcc)/(change in Vout)
vi) slew rate
Slew rate can be defined as the maximum rate of change of output voltage of op-amp with respect to time. It is expressed as S = (dVo / dt) max in V/Sec.
Where slew rate S = 2П f Vm in V/Sec.
11. Why open loop op-amp configurations is not used in linear applications?
a. The open loop gain of the op-amp is very high. Therefore only the smaller signals having low frequency may be amplified accurately without distortion.
b. Open loop Voltage gain of the op-amp is not a constant voltage gain varies with changes in temperature and power supply as well as mass production techniques. This makes op-amp unsuitable for many linear applications
c. Bandwidth of most open loop op-amps is negligibly small or almost zero therefore op-amp is impractical in ac applications.
12. Determine the slew rate of the op-amp.
Slew rate can be defined as the maximum rate of change of output voltage of op-amp with respect to time. It is expressed as S = (dVo / dt) max in V/Sec.
Where slew rate S = 2П f Vm in V/Sec.
13. What is active load? Where it is used and why?
In circuit design, an active load is a circuit component made up of active devices, such as transistors, intended to present a high small-signal impedance yet not requiring a large DC voltage drop, as would occur if a large resistor were used instead. Such large AC load impedances may be desirable, for example, to increase the AC gain of some types of amplifier.
Most commonly the active load is the output part of a current mirror and is represented in an idealized manner as a current source. Usually, it is only a constant-current resistor that is a part of the whole current source including a constant voltage source as well
DESIGN AND ANALYSIS OF ALGORITHMS–Question Bank 2012 Edition
Anna University
CS2251 DESIGN AND ANALYSIS OF ALGORITHMS
QUESTION BANK
2012 Edition
UNIT – I
PART A(2MARKS)
1. What is an algorithm?
2. What is meant by open hashing?
3. Define Ω-notation
4.Define order of an algorithm.
5. Define O-notation
6. Define conditional big-oh notation.
7. What do you mean by best case efficiency?
8. What is meant by worst case?
9. Define average case efficiency.
10. Why space complexity of a program is necessary?
11. What is an algorithm design technique?
12. Define little-oh notation.
13. Compare the order of growth n! and 2!
14. What are the types of algorithm efficiencies?
15. Prove or disprove if t(n) E O(g(n))then g(n) E omega t(n)?
PART B(16 MARKS)
1.(i) Explain the various criteria used for analyzing algorithms.
(ii) List the properties of various asymptotic notations.
2. (i) Explain the necessary steps for analyzing the efficiency of recursive algorithms.
(ii) Write short notes on algorithm visualization.
3. Describe briefly the notations of complexity of an algorithm.
4. (i) What is pseudo-code?Explain with an examples.
(ii) Find the complexity (C(n)) of the algorithm for the worst case ,best case and average case.(evaluate average case complexity for n=3,where n is number of inputs)
5. (i) What are the important problem types focused by the researchers?Explain any two with examples.
(ii) What is empirical analysis of an algorithm?Discuss its strength &weakness?
UNIT II
PART A (2 MARKS)
1. Give an non-recursive algorithm to find out the largest element in a list of n numbers.
2. What is meant by divide &conquer?
3. Give the recurrence relation for divide &conquer.
4. What is meant by greedy algorithm?
5. What is meant by knapsack problem?
6. Define fractional knapsack problem.
7. What is the difference between quicksort and mergesort?
8. Give the algorithm of quick sort.
9. What is binary search?
10. What is the average case complexity of linear search algorithm?
11.Define depth first searching technique.
12. Write the procedure for selection sort.
13. Differentiate dynamic programming and divide and conquer..
14. Give two real time problems that could be solved using greedy algorithm.
15. State the time complexity of bubble sort algorithm.
PART B(16 MARKS)
1.(i) Write a psedocode for divide and conquer algorithm for merging two sorted arrays into a single sorted one.Explain with an example. 8
(ii) Set up and solve a recurrence relation for the number of key comparisions made the above psedo code. 8
2. Design a recursive decrease by-one algorithm for sorting the n real numbers in an array with an examples and also determine the number of key comparisions and time efficiency of an algorithm.
| 16 | |
| 3. (i)Define heap.Explain the properties of heap. | 8 |
| (ii) Write a simple example to explain heap sort algorithm. | 8 |
| 4.(i) Write an algorithm to sort a set of N numbers using insertion sort. | 8 |
| (ii) Trace the algorithm for the following set of numbers:20,35,18,8,14,41,3,39. | 8 |
| 5. (i) Explain the difference between depth first and depth first searches. | 8 |
| (ii) Mention any three search algorithm which is referred in general. | 8 |
UNIT III
PART A(2 MARKS)
1. Define dynamic programming.
2. Differentiate between greedy method and dynamic programming.
3. Differentiate between divide and conquer and dynamic programming.
4. Define multistage graph.
5.What is meant by all pairs shortest path problem?
6.Write the running time of 0/1 knapsack problem.
7.Define optimal binary search tree.
8. What is meant by all pairs shortest path problem?
9. Give an application of dynamic programming algorithm.
10. Give the running time of the optimal BST algorithm.
11. Write recurrence relation for 0/1 knapsack problem.
12. Write down the floyds algorithm.
13. What is meant by bottom up dynamic programming?
14. What is meant by travelling salesperson problem?
15. What is the running time of dynamic programming TSP?
Part B (16 MARKS)
1. Describe the travelling salesman poblem and discuss how to solve it using dynamic programming?
2. Solve the all pairs shortest path problem for the diagraph with the weight matrix given below.
| a | b | c | d | |
| a | 0 | ∞ | 3 | ∞ |
| b | 2 | 0 | ∞ | ∞ |
| c | ∞ | 7 | 0 | 1 |
| d | 6 | ∞ | ∞ | 0 |
3. Find the optimal binary search tree for the key and probabilities given below.
4. Find the optimal solution for the given knapsack problem.
5. Solve all pairs shortest path problem for the digraph. 16
b to a -2,a to c-3,c to d-1,c to b-7,d to a- 6
UNIT IV
PART A (2marks)
1. State if backtracking always produces optimal solution.
2. Define backtracking.
3. What are the two types of constraints used in backtracking?
4. What is meant by optimization problem?
5. Define Hamiltonian circuit problem.
6. What is Hamiltonian cycle in an undirected graph?
7. Define 8queens problem.
8. List out the application of backtracking.
9. Define promising node and non-promising node.
10. Give the explicit and implicit constraint for 8-queen problem.
11. How can we represent the solution for 8-queen problem?
12. Give the categories of the problem in backtracking.
13. Differentiate backtracking and over exhaustive search.
14. What is state space tree?
15. Find optimal solution for the knapsack instance n =3,w=[20,15,15],P =[40,25,25]and C =30
PART B (16 MARK)
1.Apply backtracking technique to solve the following instance of the subset sum problem S = [1,3,4,5} and d=11 16
2. Explain subset-sum problem and discuss the possible solution strategies using backtracking.
3.Explain N-quence problem with an algorithm.Explain why backtracking is defined as a default procedure of last resort for solving problems.
4. (i) Explain ithe subset-sum problem in detail by justifying it using backtracking algorithm. 8 (ii) Apply backtracking to the problem of finding a Hamiltonian circuit for the following graph.
5. What is backtracking?Explain in detail.
UNIT- V
PART A(2 MARKS)
1. What is heuristics?
2. Explain briefly branch and bound technique for solving problems.
3. Differentiate between DFS and BFS.
4. What is travelling salesperson problem?
5. What is the formula used to find upper bound for knapsack problem?
6. Differentiate between back tracking and branch and bound.
7. Define articulation point.
8. Define spanning tree.
9. List out the application of branch and bound technique.
10. What is the assignment problem?
11.What is tree edge and cross edge?
12.Define back edge and tree edge.
13.What is the real time application of the assignment problem?
14. What is the metric used to measure the accuracy of approximation of algorithm?
15. What is pre-structuring ?Give examples.
PART B (16 MARK)
1.Solve the following instance of the knapsack problem by the branch and bound algorithm.
| Item | Weight | Value |
| 1 | 4 | $40 |
| 2 | 7 | #42 |
| 3 | 5 | $25 |
| 4 | 3 | $12 |
The Knapsack’s capacity W=10
2. Discuss the solution for knapsack problem using branch and bound technique.
3. What is branch and bound technique?Explain how knapsack problem could be solved using branch and bound technique.Solve the following instance of the knapsack problem by branch and bound algorithm for W=16
4.What is branch and bound?Explain in detail. 16
|
5. Consider the below matrix for assignment problem involving persons and jobs.Explain in detail how branch and bound technique is useful in solving assignment problems.
Microprocessors and Microcontrollers– Question Bank 2012 Edition
Anna University
Subject Name : CS2252- Microprocessors and Microcontrollers
QUESTION BANK
2012 Edition
UNIT-I
8085 MICROPROCESSOR
PART-A (2 MARKS)
1. Name the various flag bits available in 8085 microprocessor.
2. Give the significance of SIM and RIM instructions available in 8085.
3. How do the address and data lines are de-multiplexed in 8085?
4. List various instructions that can be used to clear accumulator in 8085.
5. When the Ready signal of 8085 is sampled by the processor?
6. List out the similarities b/w the CALL_RET and PUSH_POP instructions.
7. What is the need of ALE signal in 8085?
8. What are the addressing modes of 8085?
9. List the interrupt signals of 8085.
10. Why multiplexing is done in 8085?
11. List the limitations of 8085.
12. What is DMA?
13. Define machine cycle and instruction cycle.
14. Why address bus is unidirectional?
15. List few instructions to clear accumulator.
16. What is the function of NOP instruction?
PART-B (16 MARKS)
1. i) Draw the block diagram of 8085 microprocessor and explain. (12)
ii). Write an assembly language program to add two 2-digits BCD Number. (4)
2. i). Explain the instruction set of 8085. (10)
ii). Write notes on status flag. (6)
3. i). Explain the architecture of Intel 8085 with the help of a block diagram. (12)
ii) Explain the similarities & differences b/w subtract and compare instructions in 8085. (4)
4. i) Describe the sequence of event that may occur during the different T state in the opcode
fetch machine cycle of 8085. (8)
ii) Write an assembly language program to convert on array of ASCII code to corresponding binary (hex)
value. The ASCII array is stored starting from 4200H.The first element contains number of elements in the array. (8)
5. i) With neat block diagram explain the architecture of 8085. (10)
ii) List out the maskable and non maskable interrupts available in 8085. (6)
6. i) How do the instructions of 8085 is classified based on their function and word length?
Give an example. (8)
ii) Write an ALP to Add two 8bit numbers. (8)
UNIT-II
8086 SOTWARE ASPECTS
PART-A (2-MARKS)
1. What you mean by pipelining in 8086 processor?
2. How the 20 bit effective address is calculated in 8086 processor.
3. What are the advantages of using memory segmentation 8086?
4. What is the macro & when it is used?
5. What is the assembler directive?
6. What is mean by s/w interrupts?
7. Compare 8085 and 8086.
8. Give the flag format of 8086.
9. What is the function of direction flag?
10. What is physical address?
11. Define OFFSET address.
12. What are the versions of 8086?
13. What are the functions of segment register?
14. What are the functions of general purpose register?
15. What is the need for segmentation?
PART-B (16 MARKS)
1. i) Explain the addressing modes of 8086 with the help of examples. (12)
ii) Write short notes on macro. (4)
2. i) Explain the instruction set 8086. (10)
ii) Write an ALP in 8086 to find sum of numbers in array. (6)
3. i) Explain the addressing modes of 8086 with the help of example. (12)
ii) Describe the action taken by 8086 when NMI pin is activated. (4)
4. i) Explain memory organization in 8086. (8)
ii) Explain the following assembler directives. (8)
a) ASSUME b) EQU c) DD d) DW
5. i) With the neat sketch explain the architecture of 8086 processor. (12)
ii) Give the significance of ‘O’ flag, ’T’flag, ’I’ flag & ’D’flag of 8086. (4)
UNIT-III
8086 SYSTEM DESIGN
PART-A (2 MARKS)
1. What is the purpose of CLK signal in an 8086 system?
2. Differentiate the operating modes of 8086 processor.
3. What is a segment override prefix? Give an example.
4. What is the use of LATCH signal on the data lines?
5. What is the need for MN/MX pin in 8086 system?
6. What is the purpose of QUEUE in 8086 processor?
7. Give the operation of CBW and TEST instructions of 8086.
8. List few string instructions of 8086.
9. What is the use of LOCK prefix?
10. What is the purpose of REP prefix?
11. What are assembler directives?
12. What are the advantages of ALP?
13. Define a MACRO.
14. What is MACRO expansion?
15. What are the types of Multiprocessor configuration.
16. What is Co-processor?
PART-B (16 MARKS)
1. i) Explain the Maximum mode of operation of 8086. (12)
ii) Write short notes on addressing memory. (4)
2. i) Explain the minimum mode of operation of 8086. (12)
ii) Write notes on addressing input and output devices. (4)
3. i) Design an 8086 based system in minimum mode containing 64kb of EPROM and
64kb of RAM. (12)
ii) Give the functions of NMI, BHE and TEST pins of 8086. (4)
4. Explain the various multiprocessor configurations. (16)
5. i) Discuss in detail the various signal of 8086. (10)
ii) Explain in detail about 8086 memory banks and associated signals for byte and word operations. (6)
UNIT-IV
I/O INTERFACING
PART-A (2 MARKS)
1. Name the two modes of operation of DMA controller?
2. List the operating modes of 8253 timer.
3. Give the control word format of timer?
4. What is the use of USART?
5. Compare serial and parallel communication.
6. What is the use of Keyboard and display controller?
7. What are the functions performed by 8279?
8. What is PPI?
9. Give the control word format for I/O mode of 8255?
10. Give the BSR mode format of 8255.
11. What is the need for interrupt controller?
12. What are the registers present in 8259?
13. What are the applications of 8253?
14. Define interrupts.
15. Define DMA process.
16. Give the status word format of 8257.
PART-B (16 MARKS)
1. Draw the Block diagram and explain the operations of 8251 serial communication interface. (16)
2. Draw the Block diagram of 8279 and explain the functions of each block. (16)
3. Draw the block diagram of programmable interrupt controller and explain its operations. (16)
4. Discuss in detail about the operation of timer along with its various modes. (16)
5. Draw the Block diagram of DMA controller and explain its operations. (16)
UNIT-V
MICRO CONTROLLERS
PART-A (2 MARKS)
1. Differentiate microprocessor and microcontrollers.
2. Differentiate RRA and RRC A instructions of 8081.
3. Give the format of PSW register of 8051.
4. What is the jump range in 8051?
5. List the features of 8051.
6. Define a Microcontroller.
7. What is special function registers?
8. What is the use of PCON register?
9. State the function of RS0 and RS1 bits of PSW?
10. Give the interrupt priorities of 8051.
11. List the addressing modes of 8051.
12. What is the use of TCON register?
13. What is the RAM size of 8051?
14. What is the ROM size of 8051?
15. What is the use of B-register in 8051?
PART-B (16 MARKS)
1. Describe the architecture of 8051 with a neat diagram. (16)
2. Explain the interrupt structure, SFR and timers of 8051. (16)
3. List out the salient features of 8051 Microcontroller. (16)
4. Explain the following instructions of 8051 with examples. (16)
a. CJNE destination, source, label b. MUL AB
c. RRL A
d. SWAP A
e. SETB P2.0
5. Discuss in detail stepper motor interfacing with 8051. (16)
Computer Organization and Architecture– 2012 Edition Question Bank
Anna University
CS2253 & COMPUTER ORGANIZATION AND ARCHITECTURE
QUESTION BANK
2012 Edition
UNIT - I
PART-A (2 MARKS)
1. Define the term Computer Architecture.
2. Define Multiprocessing.
3. What is meant by instruction?
4. What is Bus? Draw the single bus structure.
5. Define Pipeline processing.
6. Draw the basic functional units of a computer.
7. Briefly explain Primary storage and secondary storage.
8. What is register?
9. Define RAM.
10. Give short notes on system software.
11. Write down the operation of control unit?
12. Define Memory address register.
13. What is stack & queue?
14. Define Addressing modes.
15. Write the basic performance equation?
16. Define clock rate.
17. List out the various addressing techniques.
18. Draw the flow of Instruction cycle.
19. Suggest about Program counter.
20. List out the types in displacement addressing.
21. What is meant by stack addressing?
22. Define carry propagation delay.
23. Draw a diagram to implement manual multiplication algorithm.
24. Perform the 2’s complement subtraction of smaller number(101011) from larger number(111001).
PART-B (16 Marks)
1. Write briefly about computer fundamental system?
2. Explain memory unit functions.
3. Explain memory locations and addresses.
4. Explain Software interface.
5. Explain instruction set Architecture? Give examples.
6. What is bus explain it in detail?
7. Explain briefly about performance evaluation by using various bench marks. List out the types of bench marks and mention its advantage and disadvantage.
8. Explain the operations of stacks and queues.
9. Discuss about different types of addressing modes.
10. Explain in detail about different instruction types and instruction sequencing.
11. Explain Fixed point representation.
12. How floating point addition is implemented. Explain briefly with a neat diagram.
13. Give the difference between RISC and CISC.
14. Write an algorithm for the division of floating point number and illustrate with an example.
UNIT-II
PART-A (2 MARKS)
1. What are the basic operations performed by the processor?
2. Define Data path.
3. Define Processor clock.
4. Define Latency and throughput.
5. Discuss the principle operation of micro programmed control unit.
6. What are the differences between hardwired and micro programmed control units?
7. Define nanoprogramming.
8. What is control store?
9. What are the advantages of multiple bus organization over a single bus organization?
10. Write control sequencing for the executing the instruction. Add R4,R5,R6.
11. What is nano control memory?
12. What is the nano instruction format of Qm-1?
13. What is the capacity of nano control memory?
14. Define micro routine.
15. What is meant by hardwired control?
16. What are the types of micro instruction?
17. Name the methods for generating the control signals.
PART-B(16 MARKS)
1. Draw and explain typical hardware control unit.
2. Draw and explain about micro program control unit.
3. Write short notes on
(i)Micro instruction format (ii) Symbolic micro instruction.
4. Explain multiple bus organization in detail.
UNIT-III
PART-A (2 MARKS)
1. What is Pipelining?
2. What are the major characteristics of a Pipeline?
3. What are the various stages in a Pipeline execution?
4. What are the types of pipeline hazards?
5. Define structural, data, and control hazard.
6. List two conditions when processor can stall.
7. List the types of data hazards.
8. List the techniques used for overcoming hazard.
9. What is instruction level parallelism?
10. What are the types of dependencies?
11. What is delayed branching?
12. Define deadlock.
13. Draw the hardware organization of two stage pipeline.
14. What is branch prediction?
15. Give two examples for instruction hazard.
16. List the various pipelined processors.
17. Why we need an instruction buffer in a pipelined CPU?
18. What are the problems faced in instruction pipeline?
19. Write down the expression for speedup factor in a pipelined architecture.
PART-B (16 MARKS)
1. Explain different types of hazards that occur in a pipeline.
2. Explain various approaches used to deal with conditional branching.
3. Explain the basic concepts of pipelining and compare it with sequence processing with a neat diagram.
4. Explain instruction pipelining.
5. What is branch hazard? Describe the method for dealing with the branch hazard?
6. What is data hazard? Explain the methods for dealing with data hazard?
7. Explain the function of six segment pipeline and draw a space diagram for six segment pipeline solving the time it takes to process eight tables.
8. Explain the influence of instruction sets.
9. Draw and explain data path modified for pipelined execution.
10. Explain about various exceptions.
UNIT – IV
PART- A (2 MARKS)
1. What is Memory system?
2. Give classification of memory.
3. Define cache.
4. What is Read Access Time?
5. Define Random Access Memory.
6. What are PROMS?
7. Define Memory refreshing.
8. What is SRAM and DRAM?
9. What is volatile memory?
10. Define data transfer or band width.
11. What is flash memory?
12. What is multi level memories?
13. What is address translation page fault routine, page fault and demand paging?
14. What is associate memory?
15. Define Seek time and latency time.
16. What is TLB?
17. Define Magneto Optical disk.
18. Define Virtual memory.
19. What are the enhancements used in the memory management?
20. Define the term LRU and LFU.
21. Define memory cycle time.
22. What is static memories?
23. What is locality of reference?
24. Define set associative cache.
25. What is meant by block replacement?
26. List the advantages of write through cache.
27. Give formula to calculate average memory access time.
28. Define conflict.
29. What is memory interleaving?
30. What is DVD?
31. Give the features of ROM cell.
32. List the difference between static RAM and dynamic RAM.
33. What is disk controller?
34. How a data is organized in the disk?
PART-B (16 MARKS)
1. Illustrate the characteristics of some common memory technologies.
2. Describe in detail about associative memory.
3. Discuss the concept of Memory interleaving and give its advantages.
4. Discuss the different mapping techniques used in cache memories and their relative merits and demerits.
5. Comparing paging and segmentation mechanisms for implementing the virtual memory.
6. What do you mean by virtual memory? Discuss how paging helps in implementing virtual memory.
7. Discuss any six ways of improving the cache performance.
8. Explain the virtual memory translation and TLB with necessary diagram.
9. Explain the organization of magnetic disk and magnetic tape in detail.
UNIT-V
PART-A (2 MARKS)
1. Define intra segment and inter segment communication.
2. Mention the group of lines in the system bus.
3. What is bus master and slave master?
4. Differentiate synchronous and asynchronous bus.
5. What is strobe signal?
6. What is bus arbitration?
7. Mention types of bus arbitration.
8. What is I/O control method?
9. What is DMA?
10. Why does the DMA priority over CPU when both request memory transfer?
11. List out the types of interrupts.
12. What is dumb terminal?
13. What is the need for DMA transfer?
14. List down the functions performed by an Input/Output unit.
PART-B(16 MARKS)
1. Explain with the block diagram the DMA transfer in a computer system.
2. Describe in detail about IOP Organization.
3. Describe the data transfer method using DMA.
4. Write short notes on the following
(a) Magnetic disk drive
(b) Optial drives.
5. Discuss the design of a typical input or output interface.
6. What are interrupts? How are they handled?
7. Give comparison between memory mapped I/O and I/O mapped I/O.
8. Explain the action carried out by the processor after occurrence of an interrupt.
9. What is DMA? Describe how DMA is used to transfer data from peripherals.
10. Explain various data transfer modes used in DMA.
11. Explain SCSI bus standards.
12. Describe the working principle of USB.
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