System Design using Xilinx Vivado Design Suite and Zynq 7000 SoC - Workshop - Anna University, CEG,Campus

Course Content :

7-Series Architecture Overview
Vivado Design Flow
Lab 1: Creating an HDL Design
Xilinx Design Constraints
Lab 2: Xilinx Design Constraints
IP Integrator and Embedded System Design Flow
Lab 3: Create a Processor System using IP Integrator
Embedded System Design with Custom IP
System Debugging using Vivado Logic Analyzer and SDK
Lab 4: Debugging using Vivado Logic Analyzer cores
Introduction to High-Level Synthesis with Vivado HLS
Improving Performance and Resource Utilization
Creating an Accelerator
Lab 5: Creating a Processor System using Accelerator
Lab 6: Camera Image Processing using Vivado Design Suite and Zynq 7000 Boards

Target of audience : 

The Faculty Members from all engineering colleges,Industrial Persons, Research Scholars, Interested UG / PG Students who are eager to learn emerging domains .

Registration fee details : 

Registration Fee :  Rs.1000/-
The registration fee should be paid by DD in favor of " ORGANISED PROGRAMMES – ANNA UNIVERSITY" payable at Chennai .

Note : 

Number of seats is limited to 40.

Important Dates : 

Last date for Registration : 07/03/2018
Intimation of Selection : 09/03/2018 
Workshop : 16/03/2018 & 17/03/2018 

Communication details  : 

The Co ordinator(s),
Two Days Workshop on System Design using
Xilinx Vivado Design Suite and Zynq 7000 SoC
Dept. of ECE, CEG Campus, Anna University
Chennai – 600 025.
Phone: 044 22358919, 044 2235 8917 / 8873.
Email: seshasayanan@annauniv.edu

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